High performance FPGA system timing design and analysis techniques
Topic      :High performance FPGA system timing design and analysis techniques

Speaker :WANG Wei, the director of Insitute of optoelectronic devices and systems in Tianjin Polytechnic University

Time       :December 10,2015  9:00 ~17:00; December 11,2015 9:00~17:00    

Location:Academic Report Hall located in the west of first floor in Research Building 

 

Main contents:

a) Digital system overview

b) FPGA and FPGA digital system

c) FPGA timing design and timing analysis

d) Code design and synthesize technology facing FPGA for timing performance

e) FPGA new resources

f)  FPGA high speed I/O interface design

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