The half adder is a fundamental combinational circuit used in digital electronics that forms the foundation for more intricate processing circuits including full adders, binary decoders, binary counters, and shift registers.

For the first time, Amer Kotb and his co-authors from different countries have employed the carrier reservoir semiconductor optical amplifiers (CR-SOAs) to design an all-optical half adder at speed of 120 Gb/s.

The CR-SOAs are incorporated in Mach-Zehnder interferometers (MZIs) configured as XOR and AND gates to execute the required SUM and CARRY logic functions, respectively. One CR-SOA-MZI is utilized to form an all-optical XOR gate, which produces the SUM logic function, while another CR-SOAs-MZI is utilized to form the AND gate, which produces the CARRY logic function.

The quality factor (Q-factor) is used as a performance metric to evaluate the operation of the all-optical half adder, and its change versus the CR-SOA fundamental operating parameters is examined in the presence of the amplified spontaneous emission noise to get more realistic results.

The simulation findings suggest that using CR-SOAs is possible to achieve Q-factors well above their permissible limit both for SUM and CARRY functions, which are executed with high quality, and hence design the half adder to exhibit high performance at ultra-high speeds.

The undertaken work can contribute in enhancing the suite of light-based technologies intended to support current and future photonic-related applications. This research includes important results for all those interested in the relevant field and it was published in Pramana - Journal of Physics.